• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor package and a method for manufacturing the same, which have no down set of a die pad and protrude from a central portion of an upper surface of an encapsulation to secure product reliability and improve wire bonding properties. Accordingly, an object of the present invention is to provide a semiconductor package and a method for manufacturing the same, which can improve the reliability of a product by changing the structure of the die pad of the lead frame and the structure of the encapsulation body. According to the present invention for achieving the above object, the die pad of the lead frame is formed flat with the same height as the inner leads, and the central part of the upper surface of the encapsulation body in consideration of the height of the semiconductor chip and the bonding wire is considered. It protrudes higher than the edges. Therefore, the present invention can maintain the upper and lower balance of the upper and lower surfaces of the encapsulation body to improve the quality of the product, and to secure the reliability by simplifying the replacement operation of the heater block.
    公开号:KR19990033767A
    申请号:KR1019970055186
    申请日:1997-10-27
    公开日:1999-05-15
    发明作者:서경민
    申请人:윤종용；삼성전자 주식회사；
    IPC主号:
    专利说明:

    Semiconductor package and manufacturing method
    BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor package, and more particularly, to a semiconductor package having no down set of a die pad and protruding from the center of an upper surface of an encapsulation body to secure product reliability and improve wire bonding properties. It relates to a manufacturing method.
    As is generally known, in recent years, as memory capacities of electronic devices and information devices are increased, semiconductor memory devices such as DRAM and SRAM are highly integrated and chip sizes are gradually increasing. On the other hand, the semiconductor chip package incorporating the semiconductor chip is light and short due to the light weight of electronic devices and information devices.
    By the way, in most of the packages in mass production, the die pad has been applied to the lead frame downset. That is, as shown in Figure 1, the semiconductor chip 1 is bonded to the upper surface of the die pad 5a of the lead frame 5 by the die bonding adhesive 3, the bonding wires 7 Bonding pads (not shown) positioned at the edge of the upper surface of the semiconductor chip 1 are wire-bonded corresponding to the inner ends of the upper surfaces of the inner leads 5b of the lead frame 5, respectively. ) Seals the respective portions except for the external leads 5c of the lead frame 5 and has a certain shape.
    In the conventional semiconductor package configured as described above, the die pad 5a of the lead frame 5 is downset, which is the thickness T1 between the upper surface of the semiconductor chip 1 and the upper surface of the encapsulation body 9. And to maintain the same thickness T2 between the lower surface of the die pad 5a and the lower surface of the encapsulation body 9 so as to balance the upper and lower surfaces of the encapsulation body 9 to ensure reliability. to be. In addition, by controlling the height difference between the upper surface of the semiconductor chip 1 and the upper surface of the inner leads (5b) of the lead frame 5 to facilitate the wire bonding and to reduce the thickness (T1) as possible This is to reduce the thickness of the entire sealing body (9).
    However, since the die pad 5a receives a lot of mechanical stress due to the downset and causes a tilt phenomenon, it is difficult to secure the planarity of the die pad. When the semiconductor chip 1 adhered to the die pad 5a is sealed by the encapsulation body 9, the die pad 5a is subjected to a lot of thermal stress by the high temperature encapsulation body 9 in the molding process. Thereby, the defect of the semiconductor package product was frequent.
    In addition, since the downset depth of the die pad 5a and the structure of the die pad 5a are changed for each product of the semiconductor package, heater blocks suitable for the downset depth and the die pad size are separately manufactured and managed in the wire bonding process. come.
    Therefore, when mass-producing a variety of semiconductor packages using a single wire bonding equipment, management must be prepared in advance to replace the heater block whenever the size of the die pad and the downset depth are changed. In addition, there was an inconvenience in the replacement of the heater block and it took a lot of time, and it was difficult to maintain the reliability of the product after the replacement of the heater block.
    Accordingly, an object of the present invention is to provide a semiconductor package and a manufacturing method which can improve the reliability of the product by changing the structure of the die pad of the lead frame and the structure of the encapsulation body.
    1 is a cross-sectional view showing the structure of a semiconductor package according to the prior art.
    2 is a cross-sectional view showing the structure of a semiconductor package according to the present invention.
    Explanation of symbols on the main parts of the drawing
    DESCRIPTION OF SYMBOLS 1 Semiconductor chip 3: Adhesive 5: Lead frame 5a: Die pad 5b: Internal lead 5c: External lead 7: Bonding wire 9: Encapsulation body 11: Semiconductor chip 13: Adhesive 15: Lead frame 15a: Die pad 15b: Internal lead 15c: outer lead 17: bonding wire 19: encapsulation
    In order to achieve the above object, a semiconductor package and a method of manufacturing the same according to the present invention have a die pad of a lead frame formed flat with the same height as the inner leads, and a center portion of the upper surface of the encapsulation body has a height of a semiconductor chip and a bonding wire. In consideration of the above it is characterized in that it protrudes higher than the upper edge of the encapsulation.
    Therefore, the present invention can maintain the upper and lower balance of the upper and lower surfaces of the encapsulation body to improve the quality of the product, and to secure the reliability by simplifying the replacement operation of the heater block.
    Hereinafter, a semiconductor package according to the present invention will be described in detail with reference to the accompanying drawings.
    2 is a cross-sectional view showing the structure of a semiconductor package according to the present invention.
    As shown in FIG. 2, the semiconductor chip 11 is bonded to the upper surface of the die pad 15a of the lead frame 15 by the die bonding adhesive 13, and the bonding wires 17 are semiconductor. Bonding pads (not shown) positioned at the edge of the top surface of the chip 11 are wire-bonded to the inner ends of the top surfaces of the inner leads 15b of the lead frame 15, respectively, and the encapsulation body 19 is The parts except for the external leads 15c of the lead frame 15 are encapsulated and have a predetermined shape. Here, the die pad 15a is not downset and is maintained at the same level as the inner leads 15b. In consideration of the heights of the semiconductor chip 11 and the bonding wire 17, the central portion of the upper surface of the encapsulation body 19 protrudes upward at a predetermined height from the edge of the upper surface of the encapsulation body 19. The whole lower surface of the sealing body 19 has comprised the flat surface.
    Referring to the manufacturing method of the semiconductor package configured as described above, first, the lead frame 15 having the same level as the height of the inner leads 15b is prepared without downsetting the die pad 15a.
    Subsequently, in the die bonding step, the semiconductor chip 11 is adhered to the upper surface of the die pad 15a by the die bonding adhesive 13.
    Subsequently, in the wire bonding process, bonding pads (not shown) on the upper edge of the semiconductor chip 11 are electrically connected to the inner ends of the upper surfaces of the inner leads 15b by the conductive bonding wires 17, respectively. Connect.
    Then, in the molding process, the parts except for the external leads 15c of the lead frame 15 are encapsulated by the encapsulation body 19, but the heights of the upper and middle edge portions of the upper surface of the encapsulation body 19 are different. do.
    In more detail, in order to maintain the upper and lower balance of the upper and lower surfaces of the encapsulation body 19, the central portion of the upper surface of the encapsulation body 19 is the height of the semiconductor chip 11 and the bonding wire 17. In consideration of the protruded higher than the upper edge portion of the encapsulation (19). Here, the thickness T11 is the thickness of the encapsulation body 19 between the center portion of the upper surface of the die pad 15a and the center portion of the upper surface of the semiconductor chip 11, and the thickness T12 is the bottom surface of the die pad 15a. And the thickness of the encapsulation body 19 between the lower surface of the encapsulation body 19 and the thickness T13 is the thickness between the upper surface of the die pad 15a and the upper surface edge portion of the encapsulation body 19.
    On the other hand, in order to keep the sum of the thicknesses T11, T12, and T13 equal to the total thickness of the encapsulation body 9 of FIG. 1, it is preferable to reduce the thickness T12 as much as possible and the thickness T11. It is preferable that and thickness T12 are the same.
    Therefore, the present invention can flatten the die pad without downset the height of the inner leads to prevent defects such as tilting of the die pad, thereby improving product reliability of the semiconductor package. In addition, in the mass production of various products, the replacement of the corresponding heater block according to the difference of the die pad in the wire bonding process may be simplified to maintain product reliability of the semiconductor package even after the replacement of the heater block.
    As described above, in the semiconductor package according to the present invention, the downset of the die pad is omitted, and the center of the upper surface of the encapsulation protrudes higher than the edge of the upper surface. Therefore, the present invention prevents the tilting of the die pad to ensure the reliability of the product, and in the wire bonding process by simplifying the replacement of the heater block according to the difference of the die pad to shorten the time required for the replacement of the heater block and the product Quality can be maintained.
    On the other hand, the present invention is not limited to the contents described in the drawings and detailed description, it is obvious to those skilled in the art that it is applicable to various forms without departing from the spirit of the present invention.
    权利要求:
    Claims (4)
    [1" claim-type="Currently amended] A lead frame having the same level of die pads and inner leads and outer leads;
    A semiconductor chip bonded to the die pad by an adhesive and having bonding pads;
    Bonding wires correspondingly electrically connecting the bonding pads to the inner leads; And
    Encapsulating the respective portions excluding the outer lead, the semiconductor package including an encapsulation protruding higher than the upper edge portion of the upper surface.
    [2" claim-type="Currently amended] The thickness T11 between the center portion of the upper surface of the encapsulation body and the upper surface of the semiconductor chip is equal to the thickness T12 between the lower surface of the encapsulation body and the lower surface of the die pad. Semiconductor package.
    [3" claim-type="Currently amended] Preparing a lead frame having the same level of die pads and inner leads and outer leads;
    Bonding a semiconductor chip having bonding pads by an adhesive to the die pad;
    A wire bonding step of electrically connecting the bonding pads and the inner leads to each other by a bonding wire; And
    A method of manufacturing a semiconductor package including a molding step of encapsulating the respective portions excluding the external leads by an encapsulation member, but molding a central portion of the upper surface higher than an edge of the upper surface.
    [4" claim-type="Currently amended] The thickness T11 between the center portion of the upper surface of the encapsulation body and the upper surface of the semiconductor chip is equal to the thickness T12 between the lower surface of the encapsulation body and the lower surface of the die pad. Semiconductor package.
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    同族专利:
    公开号 | 公开日
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    法律状态:
    1997-10-27|Application filed by 윤종용, 삼성전자 주식회사
    1997-10-27|Priority to KR1019970055186A
    1999-05-15|Publication of KR19990033767A
    优先权:
    申请号 | 申请日 | 专利标题
    KR1019970055186A|KR19990033767A|1997-10-27|1997-10-27|Semiconductor package and manufacturing method|
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